IDT Namespace Reference

"Interrupt Descriptor Table (IDT) More...

Classes
struct	InterruptDescriptor.__unnamed34__.__unnamed36__

Enumerations
enum	Gate {   GATE_TASK = 0x5 ,   GATE_INT = 0x6 ,   GATE_TRAP = 0x7 }
	Gate types. More...
enum	GateSize {   GATE_SIZE_16 = 0 ,   GATE_SIZE_32 = 1 }
	Segment type. More...
enum	DPL {   DPL_KERNEL = 0 ,   DPL_USER = 3 }
	Descriptor Privilege Level. More...

Functions
void	load ()
	Load the IDT's address and size into the IDT-Register via idtr.
void	handle (uint8_t vector, void *handler, enum Gate type=Gate::GATE_INT, enum GateSize size=GateSize::GATE_SIZE_32, enum DPL dpl=DPL::DPL_KERNEL, bool present=true)
	Configure entry point for interrupt handling. More...

Detailed Description

"Interrupt Descriptor Table (IDT)

See also

ISDMv3 6.14 Exception and Interrupt Handling in 64-bit Mode

---

Class Documentation

IDT::InterruptDescriptor.__unnamed34__.__unnamed36__

struct IDT::InterruptDescriptor.__unnamed34__.__unnamed36__

Class Members
uint8_t	ist: 3	IST Index (64 bit)
uint8_t	__pad0__: 5	unused, has to be 0
Gate	type: 3	gate type
GateSize	size: 1	gate size
uint8_t	__pad1__: 1	unused, has to be 0
DPL	dpl: 2	descriptor privilege level
uint8_t	present: 1	present: 1 for interrupts

Enumeration Type Documentation

Gate

enum IDT::Gate

Gate types.

See also

ISDMv3 3.5 System Descriptor Types

Enumerator
GATE_TASK	Task Gate.
GATE_INT	Interrupt Gate.
GATE_TRAP	Trap Gate.

GateSize

enum IDT::GateSize

Segment type.

See also

ISDMv3 3.5 System Descriptor Types

Enumerator
GATE_SIZE_16	16 bit
GATE_SIZE_32	32 / 64 bit

DPL

enum IDT::DPL

Descriptor Privilege Level.

Enumerator
DPL_KERNEL	Ring 0 / Kernel mode.
DPL_USER	Ring 3 / User mode.

Function Documentation

handle()

void IDT::handle	(	uint8_t	vector,
		void *	handler,
		enum Gate	type = Gate::GATE_INT,
		enum GateSize	size = GateSize::GATE_SIZE_32,
		enum DPL	dpl = DPL::DPL_KERNEL,
		bool	present = true
	)

Configure entry point for interrupt handling.

The provided entry function ("handler") is required to, as first step, save the registers.

Parameters

vector	Interrupt vector number for which the handler is to be set/changed
handler	Low-level entry point for interrupt handling
type	Gate type (Interrupt, Trap, or Task)
size	16- or 32-bit
dpl	Permissions required for enter this interrupt handler (kernel- or user space)
present	Denotes whether the IDT descriptor is marked as available